Why does Intel Agilex® 7 EMIF IP Example Design Fails simulation in Intel® Quartus® Prime Standard Edition Software version 19.1 for support the Aldec* Riviera* VHDL simulator? - Why does Intel Agilex® 7 EMIF IP Example Design Fails simulation in Intel® Quartus® Prime Standard Edition Software version 19.1 for support the Aldec* Riviera* VHDL simulator? Description Due to a problem in the Intel® Quartus® Prime Standard Edition Software version 19.1, you may encounter simulation failures for Aldec* Riviera* VHDL simulator older version. Resolution Recommended to use Aldec* Riviera* VHDL simulator version 2020.04 for Intel® Quartus® Prime Standard Edition Software version 19.1 onwards. Custom Fields values: ['novalue'] Troubleshooting 14012332298 False ['External Memory Interfaces (EMIF) IP'] ['FPGA Dev Tools Quartus® Prime Software'] 21.3 19.1 ['Agilex™ FPGA Portfolio'] ['Simulation Development Tools'] ['novalue'] ['novalue']