Error : agilex5_emif_hps_0.emif_hps_0: Memory Preset (MEM_PRESET_ID) has invalid value - LPDDR4-2667 CL24 Component Dual-Channel 1R 1CPR 16Gb (32Gb Total) x16 CK 1200.0 MHz - Error : agilex5_emif_hps_0.emif_hps_0: Memory Preset (MEM_PRESET_ID) has invalid value - LPDDR4-2667 CL24 Component Dual-Channel 1R 1CPR 16Gb (32Gb Total) x16 CK 1200.0 MHz Description In Quartus® Prime Pro Edition Software version 24.2, when compiling the External Memory Interface IP for FPGA fabric or Hard Processor System (HPS) on Agilex™ 5 FPGAs, you may encounter the following error : Error: agilex5_soc_emif_hps_0.emif_hps_0: Memory Preset (MEM_PRESET_ID) has invalid value - LPDDR4-2667 CL24 Component Dual-Channel 1R 1CPR 16Gb (32Gb Total) x16 CK 1200.0 MHz. Valid values include: {LPDDR4-2133 CL20 Component Dual-Channel 1R 1CPR 16Gb (32Gb Total) x16 CK 1066.0 MHz} Info: agilex5_soc_emif_hps_0.emif_hps_0: Configuring this IP for device OPN (Agilex 5). This device has speedgrade <>. This is because the supported rates have been updated to match the JEDEC bins of the protocol. Resolution To avoid the error, update the memory speed on the EMIF IP GUI in Platform Designer and recompile. This is scheduled to be updated on the External Memory IP Relese notes which is a preliminary version of the document and subject to change. Custom Fields values: ['novalue'] Troubleshooting 18038724197 False ['External Memory Interfaces (EMIF) IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.2 24.2 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']