Is LVDS I/O standard input pin supported on the 3V I/O bank when powered by VCCPT? - Is LVDS I/O standard input pin supported on the 3V I/O bank when powered by VCCPT? Description No, you cannot place the LVDS I/O standard input pin into 3V I/O banks even when powered by VCCPT. You will receive the following error message: Error (14566): The Fitter cannot place <number of failed cells> periphery component(s) due to conflicts with existing constraints <failed cell summary> if you place the LVDS I/O standard into 3V I/O banks. Resolution There is no workaround for this problem. Custom Fields values: ['novalue'] Troubleshooting FB: 279495; HSD: 1506811895 False ['novalue'] ['novalue'] novalue novalue ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']