Why might the PCI Express configuration fail link training at low temperature for Cyclone V GT and ST devices? - Why might the PCI Express configuration fail link training at low temperature for Cyclone V GT and ST devices?
Description Due to a problem in Quartus® Prime software version 17.0 and earlier, you may observe PCIe Signal Detect (SD) circuit unable to assert or switch “ON” at low temperature. Please check Cyclone® V Errata sheet for more details. Resolution To work around this problem in Cyclone V GT and ST devices, make the following changes: Add the following Quartus Prime Settings File (QSF) assignment for all PCI Express receiver channels in your design. set_instance_assignment -name XCVR_RX_COMMON_MODE_VOLTAGE VTT_0P70V -to <pin_name> set_instance_assignment -name XCVR_RX_SD_THRESHOLD 5 -to <pin_name> Include the above assignment to all PCI Express receiver pins in the design and do not use wildcard characters (*) in the assignments. However, Quartus Prime software version before 17.0 will not allow fitter compilation with the above QSF assignment. Hence, please contact MySupport for a patch.
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Troubleshooting
FB: 386594;
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['Cyclone® V GT FPGA', 'Cyclone® V ST FPGA']
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['novalue'] - 2021-08-25
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