Under what conditions might the Deterministic Latency PHY fail to achieve rx_syncstatus when implementing the OBSAI protocol in Arria® V GX/GT devices? - Under what conditions might the Deterministic Latency PHY fail to achieve rx_syncstatus when implementing the OBSAI protocol in Arria® V GX/GT devices? Description When implementing the OBSAI protocol using the Deterministic Latency PHY in Arria® V GX/GT devices, you may fail to achieve rx_syncstatus when IDLE, IDLE_ACK, and IDLE_REQ patterns are sent during the link-up process. Resolution You can achieve synchronization by retriggering rx_patternalign or asserting rx_digitalreset. This applies to the Deterministic Latency PHY with the following configuration. Data Rate: 6.144 Gbps PMA-PCS Data Width: 20-bits Related Articles Under what conditions might the Deterministic Latency PHY fail to achieve rx_syncstatus when implementing the OBSAI protocol in Arria® V GZ and Stratix® V devices? Under what conditions might the Deterministic Latency PHY fail to achieve rx_syncstatus when implementing the OBSAI protocol in Cyclone® V devices? Custom Fields values: ['novalue'] Troubleshooting 198618 False ['Arria® V Transceiver Native PHY IP'] ['FPGA Dev Tools Quartus II Software'] novalue No plan to fix ['Arria® V FPGAs and SoCs', 'Arria® V GT FPGA', 'Arria® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']