Error: couldn't read file "<variation_name>_phy_ddr_timing.tcl": no such file or directory while executing "source "<variation_name>_phy_ddr_timing.tcl" (file "<sub-directory>/<variation_name>_phy_ddr_timing.sdc" line 33) - Error: couldn't read file "<variation_name>_phy_ddr_timing.tcl": no such file or directory while executing "source "<variation_name>_phy_ddr_timing.tcl" (file "<sub-directory>/<variation_name>_phy_ddr_timing.sdc" line 33) Description In the Quartus® II software version 9.1 and 9.1SP1, the sdc script is unable to source the "<variation_name>_phy_ddr_timing.tcl" file during compilation if the IP files for ALTMEMPHY or High Performance Controllers for DDR2 and DDR3 SDRAM interfaces in Arria® II GX and Stratix® IV devices are not located in the project top level directory. The workaround is to place a copy of the <variation_name>_phy_ddr_timing.tcl in the top level project directory. For the TimeQuest Report DDR command to work, also place a copy of these tcl files in the top level project directory: 1. <variation_name>_phy_ddr_pins.tcl 2. <variation_name>_phy_report_timing.tcl 3. <variation_name>_ phy_report_timing_core.tcl If you re-generate the IP, you need to copy over the tcl files again. This issue is expected to be fixed in a later version of Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® II GX FPGA', 'Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']