Warning(332060): Node: MEM0_DQS_P[0] was determined to be a clock but was found without an associated clock assignment - Warning(332060): Node: MEM0_DQS_P[0] was determined to be a clock but was found without an associated clock assignment Description You may see the warning while compiling Agilex™ 7 FPGA M-Series EMIF IP. Resolution DQS clock name has to be *dqs_t and *dqs_c at the top module to associate DQS as clock signals. For example //inout [ 4:0] MEM0_DQS_P, //inout [ 4:0] MEM0_DQS_N, inout [ 4:0] MEM0_dqs_t, inout [ 4:0] MEM0_dqs_c, This problem is planned to be fixed in a future release of Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 16021451486 False ['External Memory Interfaces (EMIF) IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.1 22.2 ['Agilex™ 7 FPGA M-Series'] ['novalue'] ['novalue'] ['novalue']