Error(19117): Programming failed on flash chip select 0 at address <address> - Error(19117): Programming failed on flash chip select 0 at address <address> Description You may see this error in Quartus® Programmer when programming a QSPI flash device attached to an Agilex® 7 FPGA device with a .JIC file, when the TCK frequency of the download cable is set to 24 MHz and if there is another device in the JTAG chain which has a maximum supported TCK frequency of less than 24 MHz. For example, a MAX® 10 FPGA device that may be in the chain has a maximum TCK frequency specification of 20 MHz. Resolution To work around this issue, in the Quartus® Programmer Hardware settings, set the Hardware Frequency to a lower frequency (e.g. 16000000Hz) and uncheck the Auto-adjust frequency at chain scanning box. Custom Fields values: ['novalue'] Troubleshooting QS-602038 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 26.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']