Why does the F-Tile CPRI FPGA IP simulation Design Example fail while generating the files in the “support_logic” folder in the QTLG flow only when we run the QTLG for the F-Tile CPRI FPGA IP simulation example design multiple times? - Why does the F-Tile CPRI FPGA IP simulation Design Example fail while generating the files in the “support_logic” folder in the QTLG flow only when we run the QTLG for the F-Tile CPRI FPGA IP simulation example design multiple times? Description Due to a problem in the F-Tile CPRI FPGA IP webcore version 23.2, you might see a failure while generating the files in the “support_logic” folder with the F-Tile CPRI FPGA IP simulation design example while running the Quartus® Tile Logic Generation(QTLG) flow in the F-Tile CPRI FPGA IP simulation example design multiple times. Resolution To work around this problem in the F-Tile CPRI FPGA IP simulation example design webcore version 23.2, follow the steps below. 1. Modify the "cpri_ii_0_testbench/ip_components/tb_top.qsf" files by commenting out the line as shown below: #set_global_assignment -name SYSTEMVERILOG_FILE support_logic/tb_top_auto_tiles.sv 2. Modify the "cpri_ii_0_testbench/testbench/tb_top.sv" file by introducing the following definition condition for “tb_top_auto_tiles tb_top_auto_tiles ()”: `ifndef ALTERA_RESERVED_QIS // Code excluded for Quartus Synthesis tb_top_auto_tiles tb_top_auto_tiles (); `endif 3. Execute the specified commands , namely "quartus_ipgenerate" and "quartus_tlg," as indicated in Section 2.8 of the User Guide." This workaround would not be necessary when the user doesn’t generate the F-Tile CPRI FPGA IP simulation example design simulation example design for CPRI FPGA IP with an Agilex™ F-Tile device. This problem is scheduled to be fixed in a future release of the F-Tile CPRI PHY FPGA IP. Custom Fields values: ['novalue'] Troubleshooting 14020165162 False ['F-Tile CPRI PHY IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.4 23.2 ['Agilex™ 7 FPGA F-Series', 'Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']