Creonic Ultrafast BCH Decoder - The Creonic Ultrafast BCH Decoder is capable of processing an entire BCH codeword per clock cycle in a pipelined way. Therefore, it achieves outstanding data rates. Creonic is the ISO 9001:2015 certified leader in ready-for-use IP cores, offering a rich services and product portfolio for wired, wireless, fiber, and free-space optical communications. Covering… Intel® Arria® 10 SX SoC FPGA Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel® MAX® 10 FPGA Arria® V GZ FPGA Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series MAX® V CPLD Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Arria® V SX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 SX SoC FPGA Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Cyclone® V GT FPGA Intel® Arria® 10 GT FPGA Arria® V ST SoC FPGA Intel® Arria® 10 GX FPGA Intel® Stratix® 10 TX FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Arria® V GX FPGA Cyclone® V E FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Cyclone® V GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel® Stratix® 10 GX FPGA Arria® V GT FPGA Intel® Cyclone® 10 LP FPGA Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel® Cyclone® 10 GX FPGA Intel® Stratix® 10 AX SoC FPGA Stratix® III FPGA The Creonic Ultrafast BCH Decoder is capable of processing an entire BCH codeword per clock cycle in a pipelined way. Therefore, it achieves outstanding data rates. The design can be parameterized at design-time to support different codeword sizes and code rates. Latency can be adjusted by insertion or removal of pipeline register stages. Aerospace Wireless Creonic Ultrafast BCH Decoder Key Features Coded throughput of up to 163.5 Gbit/s at 320 MHz (FPGA, 511 codeword bits) Offering Brief No No No No C/C++ Verilog VHDL Intel® Arria® 10 SX SoC FPGA Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel® MAX® 10 FPGA Arria® V GZ FPGA Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series MAX® V CPLD Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Arria® V SX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 SX SoC FPGA Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Cyclone® V GT FPGA Intel® Arria® 10 GT FPGA Arria® V ST SoC FPGA Intel® Arria® 10 GX FPGA Intel® Stratix® 10 TX FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Arria® V GX FPGA Cyclone® V E FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Cyclone® V GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel® Stratix® 10 GX FPGA Arria® V GT FPGA Intel® Cyclone® 10 LP FPGA Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel® Cyclone® 10 GX FPGA Intel® Stratix® 10 AX SoC FPGA Stratix® III FPGA No Yes 22.4.0 Offering Brief Production a1JUi0000049U91MAE What's Included Deliverable includes Verilog source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model Ordering Information Creonic Ultrafast BCH Decoder a1JUi0000049U91MAE Production Intellectual Property (IP) Communication a1MUi00000BO8rZMAT a1MUi00000BO8rZMAT Select 2025-11-21T23:47:48.000+0000 The Creonic Ultrafast BCH Decoder is capable of processing an entire BCH codeword per clock cycle in a pipelined way. Therefore, it achieves outstanding data rates. Partner Solutions