CPRI IP Cores That Target an Arria II GZ, Stratix IV, or Stratix V Device Fail Recovery Timing - CPRI IP Cores That Target an Arria II GZ, Stratix IV, or Stratix V Device Fail Recovery Timing Description CPRI IP cores that target an Arria II GZ, Stratix IV, or Stratix V device fail recovery timing. Specifically, the path from the rx_digitalreset_cpri_clk_sync2 global reset signal to the internal local_reset signal violates the IP core timing requirements. Resolution To work around this issue, in your Quartus II Settings file (. qsf ), add the following assignment to demote the global reset signal: set_instance_assignment -name GLOBAL_SIGNAL OFF -to *rx_digitalreset_cpri_clk_sync2 This issue will be fixed in a future version of the CPRI MegaCore function. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.1.1 ['Arria® II FPGAs', 'Stratix® IV FPGAs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']