What is the correct length of the Error Message Register (EMR) in Arria 10 devices? - What is the correct length of the Error Message Register (EMR) in Arria 10 devices? Description The correct length of the Error Message Register (EMR) in Arria ® 10 devices is 78-bits. This register stores the Configuration RAM (CRAM) error location that is induced by a Single Event Upset (SEU) event. Due to an issue in the Quartus ® Prime software, the following IPs incorrectly indicate that the EMR data width is 119-bits for Arria 10 devices. Altera ® Error Message Register Unloader IP Advanced SEU Altera Advanced SEU Detection IP Altera Fault Injection IP Resolution You may tie EMR[118:78] to GND in your design in these IP. The EMR data width in these IP will be updated to 78-bits in a future release of the Quartus Prime software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 15.0 ['Arria® 10 FPGAs and SoCs', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']