Embedded Peripherals IP User Guide - Altera® FPGA MII to RMII Converter Core - Table 461. The Parameter Scenario is incorrect - Embedded Peripherals IP User Guide - Altera® FPGA MII to RMII Converter Core - Table 461. The Parameter Scenario is incorrect Description Table 461. Parameter Usage Scenario, in section 50. Intel® FPGA MII to RMII Converter Core in the Embedded Peripherals IP User Guide is incorrect: UG-01085 ID: 683130 Version 2021.12.13 50.3 Parameters Resolution The last two rows of this table should show MAC_SPEED as 0 . MIIMAC2CORESPEED10 equals port ena_10 The correct table should look like the image shown below: This updated information has been added to Version 22.3 (2023.02.09) of the Embedded IP User Guide. Custom Fields values: ['novalue'] Troubleshooting 18020283737 False ['Interfaces'] ['FPGA Dev Tools Quartus® Prime Software'] 23.2 21.4 ['Arria® V FPGAs and SoCs', 'Cyclone® V FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 FPGAs', 'Stratix® 10 FPGAs and SoCs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue'] - 2023-10-31

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