Low Speed DDR2 Fails Calibration on Cyclone V Devices - Low Speed DDR2 Fails Calibration on Cyclone V Devices
Description This problem affects DDR2 products. DDR2 interfaces targeting Cyclone V devices at speeds less than 267 MHz may fail calibration in the guaranteed read stage. Resolution The workaround for this issue is to continue using an earlier version, or contact Altera Technical Support for assistance by creating a Service Request at http://www.altera.com/mysupport . This issue will be fixed in a future version.
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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12.1
['Programmable Logic Devices']
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['novalue'] - 2021-08-25
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