Why does the Pin Planner in the Intel® Quartus® Prime Software show a transceiver dedicated reference clock pin on the right side of an Intel® Arria® 10 device that only has transceiver channels on the left side? - Why does the Pin Planner in the Intel® Quartus® Prime Software show a transceiver dedicated reference clock pin on the right side of an Intel® Arria® 10 device that only has transceiver channels on the left side? Description Intel® Arria® 10 devices that support transceiver channels on the left side only may have a dedicated transceiver REFCLK pin on the right hand side of the device. These pins do not connect to left-side transceivers, but you may use this to drive right-side fPLLs and core logic. Resolution N/A Custom Fields values: ['novalue'] Troubleshooting - False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 15.1 ['Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']