Why does the BAR offset of the MSI-X Table and PBA for Intel® Stratix® 10 PCI Express* Hard IP fail to take effect? - Why does the BAR offset of the MSI-X Table and PBA for Intel® Stratix® 10 PCI Express* Hard IP fail to take effect? Description Due to the issue of Intel® Quartus® Prime Pro software, the MSI-X Table BAR offset and PBA specified in the GUI for Intel® Stratix® 10 PCI Express* Hard IP, fail to take effect. This can be seen by using the “lspci” command on Linux OS. Hence the MSI-X functionality will fail to operate correctly due to the address of MSI-X Table overlapping the PBA. This issue impacts the following IP cores: Intel® Stratix® 10 Avalon®-MM interface for PCI Express* Intel® Stratix® 10 Avalon®-ST interface for PCI Express* Avalon®-MM Intel® Stratix® 10 Hard IP for PCI Express*. Resolution This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition software version 19.3. Custom Fields values: ['novalue'] Troubleshooting 1507362683 True ['Avalon-MM Stratix® 10 Hard IP for PCI Express', 'Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.3 18.0 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']