Mixer II IP Core Input Frames Do Not Appear When Enabled - Mixer II IP Core Input Frames Do Not Appear When Enabled Description The Mixer II IP core does not display an input stream when you enable the input by setting bit 0 of the corresponding input enable register. Resolution To fix this problem, set bit 0 and bit 2 of the input enable register. This issue will be fixed in a future version of the Mixer II IP core. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 15.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']