Does the Intel® Stratix® 10 Avalon® -ST Hard IP for PCI Express* support 3 physical functions (PFs) in the Intel® Quartus® Prime Pro Edition software version 18.0? - Does the Intel® Stratix® 10 Avalon® -ST Hard IP for PCI Express* support 3 physical functions (PFs) in the Intel® Quartus® Prime Pro Edition software version 18.0? Description Due to a problem in the Intel® Stratix® 10 Avalon® -ST Hard IP for PCI Express* version 18.0, users will get the following error message when selecting 3 physical functions (PFs): Error: pcie_avst.pcie_s10_hip_ast_0: The current value "64-bit prefetchable memory" for parameter "Type" (pf1_bar0_type_hwtcl) is invalid. Possible valid values are: "Disabled". . Rule(s): pf1_pci_type0_bar0_enabled. Error: pcie_avst.pcie_s10_hip_ast_0: The current value "64-bit prefetchable memory" for parameter "Type" (pf2_bar0_type_hwtcl) is invalid. Possible valid values are: "Disabled". . Rule(s): pf2_pci_type0_bar0_enabled. Resolution To work around this problem for the Intel® Quartus® Prime Pro Edition software version 18.0, use maximum of 2 PFs. This problem is fixed in the Intel® Quartus® Prime Pro Edition software version 18.1 and onwards. Custom Fields values: ['novalue'] Troubleshooting 1408826935 False ['Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.1 18.0 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']