Why do I see multiple warnings "Warning: NUMERIC_STD."=": metavalue detected, returning FALSE" when simulating the FIR II FPGA IP Core? - Why do I see multiple warnings "Warning: NUMERIC_STD."=": metavalue detected, returning FALSE" when simulating the FIR II FPGA IP Core? Description These warnings occur during simulation due to an uninitialized data counter signal driving a state machine in the FIR II FPGA IP Core generated file: auk_dspip_avalon_streaming_source_hpfir.vhd. Resolution These warnings are not expected to cause any functional issues as the state machine is driven to a known state during reset. This Warning can be safely ignored by users. This problem is not scheduled to be fixed in a future release of the Quartus® Prime Software. Custom Fields values: ['novalue'] Troubleshooting 16017335661 False ['FIR II IP'] ['FPGA Dev Tools Quartus® Prime Software'] 22.4 21.4 ['Arria® II FPGAs', 'Arria® V FPGAs and SoCs', 'Cyclone® IV FPGAs', 'Cyclone® V FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 FPGAs', 'MAX® 10 10 FPGAs', 'Stratix® 10 FPGAs and SoCs', 'Stratix® IV FPGAs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']