Warning: CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0. - Warning: CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0. Description You may get this warning when simulating some DSP Builder® designs under Modelsim®. These warning messages do not have any effect on your simulation results, and can be ignored. Resolution These warnings (and all others like them) can be suppressed by either of two methods: Suppress via Modelsim GUI: Open the Simulation dialog box (Options menu). Set the option Suppress Warnings from Synopsys Packages to On. Click OK. Search for the *_atb.do file in your project directories, look for the comment "Disable some warnings ...", and comment out a later line as follows: # Disable some warnings that occur at the very start of simulation quietly set StdArithNoWarnings 1 run 0ns # quietly set StdArithNoWarnings 0 run -all Related Articles ASSERT/WARNING from package ieee.STD_LOGIC_ARITH, Built-in function result set to 'X' due to a ('U', 'X', 'W', 'Z', '-') in an operand / Built-in function CONV_INTEGER/TO_INTEGER argument too large Warning: CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0! (ModelSim, VHDL Output File ( .vho )) Custom Fields values: ['novalue'] Troubleshooting 2205826465 False ['DSP'] ['FPGA Dev Tools Quartus II Software'] 14.1 13.1.3 ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['DSP Builder for Pro Edition'] ['novalue'] ['novalue']