Pre-adder Square Mode Feature in Intel® Stratix® 10 DSP Implemented as an External ALM - Pre-adder Square Mode Feature in Intel® Stratix® 10 DSP Implemented as an External ALM Description The DSP User Guides wrongly indicate that the pre-adder should be inside the DSP block in the following figures: Figure 13. Pre-adder Square Mode (Intel FPGA Integer Arithmetic IP Cores User Guide) Figure 36. Pre-adder Square Mode (Intel® Stratix® 10 Variable Precision DSP Blocks User Guide) Resolution However, Intel® Stratix® 10 DSP atom does not support pre-adder square mode. You can still use this feature by using the Intel FPGA Multiply Adder IP, but the pre-adder square mode is implemented as an external ALM. Custom Fields values: ['novalue'] Troubleshooting FB: 579513, 584812; False ['Floating Point', 'Primitive DSP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 18.0 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']