ApSRAM Controller (will not be supported for FPGA devices, can be used during SoC Protyping in FPGA) - ApSRAM Controller is a low-latency, low-power IP scalable from 64Mb to 1Gb with multi-bank architecture for high throughput. Designed for AI/ML, edge, automotive, and IoT systems, it supports AXI… Mobiveil, Inc.(a GlobalLogic company) is a fast-growing technology company headquartered in Santa Clara, California, specializing in Silicon Intellectual Properties (SIP), application platforms, and… Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Arria® V SX SoC FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE SoC FPGA Cyclone® V ST SoC FPGA Cyclone® V SX SoC FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Intel® Arria® 10 GT FPGA Intel® Arria® 10 GX FPGA Intel® Arria® 10 SX SoC FPGA Intel® Cyclone® 10 GX FPGA Intel® Stratix® 10 AX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA Intel® Stratix® 10 TX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Highly configurable, low-latency, low-power ApSRAM controller compliant with AXI4 and AP Memory specifications, supporting up to 32 host ports, multi-rank, multi-bank architecture, and advanced power management for SRAM-replacement memory in AI/ML, IoT, automotive, and embedded systems. The Mobiveil ApSRAM Controller is a technology-independent, system-validated IP targeting SRAM-replacement memory (64Mb to 1Gb) located close to the processing unit to act as embedded SRAM (eSRAM). It supports multi-bank/multi-rank architectures, AXI4 system interface (up to 32 ports), APB configuration registers, and multiple QoS arbitration schemes. Features include dynamic power management, self/partial refresh, per-bank refresh, built-in BIST and scan integration, intelligent request scheduling, and look-ahead command processing for high bus efficiency. Delivered with RTL, HDL testbench, protocol checkers, performance monitors, and design/verification/synthesis guides. ASIC Proto Consumer Data Center Cloud (Public, Private, Hybrid) Data Center OEM (IHV, ISV, SI, VAR) Industrial Transportation Wireless ApSRAM Controller (will not be supported for FPGA devices, can be used during SoC Protyping in FPGA) Key Features Compliant with AXI4 specification Offering Brief No No No No Encrypted Verilog Verilog Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Arria® V SX SoC FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE SoC FPGA Cyclone® V ST SoC FPGA Cyclone® V SX SoC FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Intel® Arria® 10 GT FPGA Intel® Arria® 10 GX FPGA Intel® Arria® 10 SX SoC FPGA Intel® Cyclone® 10 GX FPGA Intel® Stratix® 10 AX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA Intel® Stratix® 10 TX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Yes Yes Offering Brief Production a1JUi0000049UJsMAM What's Included Configurable RTL Code Ordering Information NA Direct a1JUi0000049UJsMAM Production Intellectual Property (IP) a1MUi00000BO8shMAD a1MUi00000BO8shMAD Select 2025-10-24T15:54:33.000+0000 ApSRAM Controller is a low-latency, low-power IP scalable from 64Mb to 1Gb with multi-bank architecture for high throughput. Designed for AI/ML, edge, automotive, and IoT systems, it supports AXI interface and various silicon technologies. It simplifies SRAM replacement while ensuring compliance and interoperability. Partner Solutions