DDR3L Designs on Stratix V ES Devices May Fail in Assembler - DDR3L Designs on Stratix V ES Devices May Fail in Assembler Description This problem affects DDR3L products. Designs targeting the DDR3L protocol on Stratix V ES devices may fail in the assembler. Resolution There is no workaround for this issue. This issue will be fixed in a future release of the external memory interface IP. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.1.2 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']