HDR MODEM - A High Data Rate (HDR) modem enables reliable transmission of large volumes of data over communication channels with high efficiency. In the transmitter, the input data packet is first protected… Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® V GS FPGA Stratix® V GX FPGA A High Data Rate (HDR) modem is designed to support reliable transmission of large amounts of digital data over communication channels while maintaining high spectral efficiency and low error rates. In an HDR modem, the transmitter first processes the incoming information packet by adding Cyclic Redundancy Check (CRC) bits for error detection and then divides the data into smaller blocks through segmentation. These blocks are encoded using advanced forward error correction (FEC) techniques such as Low-Density Parity-Check Code, often implemented in a quasi-cyclic structure to enable efficient hardware processing. The encoded bits then undergo rate matching and bit interleaving to adapt to channel conditions and distribute potential burst errors. After concatenation, the data is transmitted through the communication channel where noise and interference may affect the signal. At the receiver side, the modem performs the reverse operations: the received soft information (LLRs) is segmented, deinterleaved, and rate-adapted before being passed to the LDPC decoder for iterative error correction. The decoded blocks are then concatenated and verified using CRC to ensure data integrity. This architecture allows HDR modems to achieve high throughput, improved reliability, and robustness in modern wireless and satellite communication systems. Modulation Aerospace Defense Government HDR MODEM Key Features Ultra-High Data Rates: Supports reception bandwidths ranging from hundreds of Mbps to several Gbps depending on modulation and hardware configuration. Offering Brief No No No No Encrypted Verilog Verilog Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Yes No 24.3.1 Offering Brief Production a1JUi000007bBYLMA2 What's Included Synthesizable RTL source code Ordering Information QB-IP-HDR-Modem-1 a1JUi000007bBYLMA2 Production Intellectual Property (IP) a1MUi00000BOWpkMAH a1MUi00000BOWpkMAH Member 2026-03-10T21:34:30.000+0000 A High Data Rate (HDR) modem enables reliable transmission of large volumes of data over communication channels with high efficiency. In the transmitter, the input data packet is first protected using CRC, then divided into smaller blocks and encoded using powerful forward error correction such as Low-Density Parity-Check Code. The encoded data undergoes rate matching and interleaving to improve robustness against channel errors before transmission. At the receiver, the process is reversed: the received soft information is deinterleaved, rate-adapted, and decoded using LDPC decoding. Finally, a CRC check verifies the correctness of the recovered data, ensuring reliable high-speed communication. Partner Solutions