Does the ALTASMI_PARALLEL megafunction support execution of the 4BYTEADDREX instruction for EPCQ256 configuration devices? - Does the ALTASMI_PARALLEL megafunction support execution of the 4BYTEADDREX instruction for EPCQ256 configuration devices? Description In the Quartus® II software version 13.0 SP1 and earlier, the ALTASMI_PARALLEL megafunction does not provide a way to issue the 4BYTEADDREX instruction to an EPCQ256 configuration device. This instruction is required to exit 4-byte addressing mode once it has been entered via the 4BYTEADDREN instruction. This is important only if using an Altera® device family older than the 28-nm generation (like Stratix® IV devices) to configure from an EPCQ256 configuration device. Device families older than 28-nm require the EPCQ256 configuration device to be in 3-Byte addressing mode to configure successfully. Resolution The following patch for the Quartus II software version 13.0 adds a port to the ALTASMI_PARALLEL megafunction that facilitates execution of the 4BYTEADDREX instruction. Download the version 13.0 patch 0.37 for Windows (.exe) Download the version 13.0 patch 0.37 for Linux (.run) Download the Readme for the Quartus II software version 13.0 patch 0.37 (.txt) This function is scheduled to be incorporated in a future verison of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Cyclone® III FPGAs', 'Cyclone® III LS FPGA', 'Cyclone® IV E FPGA', 'Cyclone® IV GX FPGA', 'Stratix® III FPGAs', 'Stratix® IV E FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']