Why is the oneAPI FPGA hardware result inconsistent with the emulation result for floating-point division? - Why is the oneAPI FPGA hardware result inconsistent with the emulation result for floating-point division? Description If there is a floating-point division operation in your oneAPI design, you may find inconsistent results between oneAPI FPGA hardware and the emulator due to the two compilation modes having different rounding modes of floating-point operations. A sample code and result is shown below: Code: float res = 1.0f/1272; Output result: The emulator result is 0.000786163, but the hardware result is 0.000786164 Resolution To work around this problem, you should use the "-fp-model=precise -no-fma" and "-Xsrounding=ieee" option in your compile command. Example command： icpx -fsycl -fintelfpga -Xshardware -Xsrounding=ieee -fp-model= precise -no-fma <source_file>.cpp This information is scheduled to be added in a future release of the FPGA Optimization Guide for oneAPI Toolkits user guide. Custom Fields values: ['novalue'] Troubleshooting 15014462733 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue No plan to fix ['Agilex™ FPGA Portfolio', 'Stratix® FPGAs'] ['novalue'] ['novalue'] ['novalue']