Why does the Qsys Component Editor not automatically recognise my VHDL signals even though the naming is correct? - Why does the Qsys Component Editor not automatically recognise my VHDL signals even though the naming is correct?
Description An issue has been identified with the automatic name recognition for signals in VHDL files imported by the Qsys Component Editor tool. In order for signals to be automatically detected by the tool, they need to be declared in lower case. This issue shall be addressed in a later version of Qsys.
Custom Fields values:
['novalue']
Troubleshooting
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False
['novalue']
['FPGA Dev Tools Quartus II Software']
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10.0
['Programmable Logic Devices']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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