Thermal Management in Altera® Stratix® 10 Devices - Same Course in Simplified Chinese: Altera® Stratix® 10 器件的散热管理 32 Minutes Thermal management is an important aspect of implementing today's high-speed devices. The more power put into a device, the more heat that must be removed. Most FPGA devices consist of a single monolithic silicon die, making the process of designing a cooling solution focused on that single die. Altera® Stratix® 10 FPGA devices, however, consist of a core die and multiple transceiver dies, each of which affect the overall thermal profile of the entire device. In this training, you'll learn about the thermal factors involved with a multi-die device and how the new Altera® Stratix® 10 Early Power Estimator (EPE) makes it easy to calculate these factors based on your design and transceiver channel use. Use these calculated factors to make decisions about your FPGA design and cooling solution. Course Objectives At course completion, you will be able to: Understand the differences in thermal management between Altera® Stratix® 10 devices and previous device families Know how to use the Altera® Stratix® 10 device Early Power Estimator (EPE) spreadsheet to calculate thermal factors for a design Take the results from the EPE to make decisions on the FPGA design and the device's cooling solution Skills Required Familiarity with the thermal management of Altera® FPGA devices Familiarity with the Early Power Estimator (EPE) Familiarity with device cooling solution modeling and design If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OTMS10. FPGA_OTMS10. <p>Thermal Management in Altera Stratix 10 Devices</p>