What is the status of the transceiver Tx pin during device configuration and when entering user-mode on Stratix V GX devices? - What is the status of the transceiver Tx pin during device configuration and when entering user-mode on Stratix V GX devices?
Description On Stratix® V GX devices, 0v will be seen on the transceiver Tx pins during device configuration. When the device enters user-mode, the Tx pin will exhibit a voltage consistent with the device datasheet.
Custom Fields values:
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Troubleshooting
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False
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['FPGA Dev Tools Quartus II Software']
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12.0.2
['Stratix® V GX FPGA']
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['novalue'] - 2021-08-25
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