Warning (15064): PLL output port clk[0] feeds output pin "c0~output" via non-dedicated routing - Warning (15064): PLL output port clk[0] feeds output pin "c0~output" via non-dedicated routing Description You may see this warning in Intel® Quartus® Prime Software when you have assigned a single-ended dedicated clock output to the n-pin of a differential pin pair in Intel MAX® 10 devices. Resolution For a single-ended dedicated clock output, assign the pin to PLL#_CLKOUTp. For a differential dedicated clock output, assign the pin pair to PLL#_CLKOUTp and PLL#_CLKOUTn. Custom Fields values: ['novalue'] Troubleshooting FB: 428620; False ['novalue'] ['novalue'] novalue novalue ['MAX® 10 10 FPGAs'] ['novalue'] ['novalue'] ['novalue'] - 2023-01-24