RapidIO II IP Core Might Enter port_error State If RapidIO Lane is Noisy - RapidIO II IP Core Might Enter port_error State If RapidIO Lane is Noisy
Description When one or more RapidIO lanes are noisy, the RapidIO II IP core might enter the port_error state. Resolution This issue has no workaround. This issue is fixed in version 14.0 of the RapidIO II MegaCore function.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
14.0
12.1
['Programmable Logic Devices']
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['novalue'] - 2021-08-25
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