What are the required MSEL pin settings on my FPGA device when programming an EPCS or EPCQ configuration device with a JTAG Indirect Configuration (.JIC) file? - What are the required MSEL pin settings on my FPGA device when programming an EPCS or EPCQ configuration device with a JTAG Indirect Configuration (.JIC) file? Description When programming your EPCS or EPCQ configuration device with the .JIC file format, the FPGA devices MSEL settings are required to be set for Active Serial (AS) or Fast Active Serial (AS) configuration scheme. You will see the "Can\'t recognize silicon ID for device <n>" error message if the MSEL settings are incorrectly set. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® GX FPGA', 'Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® FPGAs', 'Cyclone® II FPGAs', 'Cyclone® III FPGAs', 'Cyclone® III LS FPGA', 'Cyclone® IV E FPGA', 'Cyclone® IV GX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA', 'Stratix® II FPGAs', 'Stratix® II GX FPGA', 'Stratix® III FPGAs', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['MicroBlaster™ Passive Serial Software Driver'] ['novalue'] ['novalue']