Why do I see warning messages during Serial Lite IV FPGA IP design compilation using the Quartus® Prime Pro Edition Software version 23.1? - Why do I see warning messages during Serial Lite IV FPGA IP design compilation using the Quartus® Prime Pro Edition Software version 23.1? Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.1, you might see the following or similar warning messages while compiling the Serial Lite IV FPGA IP designs targeting Stratix® 10 and Agilex™ 7 devices: Warning(14284): Synthesized away the following node(s) Warning(14285): Synthesized away the following node(s) of type RAM Warning(14320): Synthesized away node "*|inst_sl4_phy|inst_ehip_xcvr*|tx_ready_sync_fifo|dcfifo_component|auto_generated|fifo_lutram|dataout_wire[0]" Warning(14320): Synthesized away node "*|inst_sl4_phy|inst_ehip_xcvr*|DESKEW.PCSDIRECT.rx_pcs64_dsk_inst|lane_loop[*].lane_delay|sm0|rdata[*]" It is safe to ignore these messages. Resolution No workaround is required. It is not impacting functionality. This problem is fixed in the Quartus® Prime Pro Edition Software version 23.3. Custom Fields values: ['novalue'] Troubleshooting 15012816147 False ['Serial Lite IV IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.3 23.1 ['Agilex™ 7 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']