Max 10 GPIO lite ip - Max 10 GPIO lite ip Hi in my project using max10 fpga i configued as a GPIO lite ip as an ddr input path, and quartus software automatically add that ip into project, now i need to edit the ip parameters, Problem is when i tried to open the ip it was showing path not available. Replies: Re: Max 10 GPIO lite ip I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you. Replies: Re: Max 10 GPIO lite ip Hello, No need. I think the problem you are facing is the missing file in your Quartus. Please try this workaround from this link: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/component/2018/failed-to-launch-megawizard-plug-in-manager--pll-intel-fpga-ip-v.html That's the solution for PLL but you can do the same in your case. Thanks Replies: Re: Max 10 GPIO lite ip Hi. You asking me to send IP file or project file. Replies: Re: Max 10 GPIO lite ip Hello, Would you be able to share your sample design file? Thanks Replies: Re: Max 10 GPIO lite ip Hi My Quartus version is 20.1 and it is lite edition and MAX10 FPGA. Thanks. Replies: Re: Max 10 GPIO lite ip Hello Kumar, I am sorry you are facing this issue. May I get your version of Quartus and your device OPN? Thank you - 2021-03-23

external_document