Why does the QSPI_ERASE or AsmiSectorErase command fail with error 0x3FF when issued through the Mailbox Client Intel® Stratix® 10 FPGA IP or Intel Stratix 10 Serial Flash Mailbox Client Intel FPGA IP respectively? - Why does the QSPI_ERASE or AsmiSectorErase command fail with error 0x3FF when issued through the Mailbox Client Intel® Stratix® 10 FPGA IP or Intel Stratix 10 Serial Flash Mailbox Client Intel FPGA IP respectively? Description Due to a problem with the Mailbox Client Intel® Stratix® 10 FPGA IP and Intel Stratix 10 Serial Flash Mailbox Client Intel FPGA IP in the Intel® Quartus® Prime Pro Edition Software version 18.1 Update 1, issuing a QSPI_ERASE or AsmiSectorErase command in the respective IP might fail with error 0x3FF. Resolution To work around this problem, use the opcode to perform a sector erase. The following script is an example flow using TCL: # Enable “Write Enable” master_write_32 $m $AsmiWrEnable 0x1 # Write 4 byte (depending on the byte addressing) master_write_32 $m $AsmiNumbByte 0x4 # Write the control (opcode) – Opcode varies for different flash devices. Check the flash datasheet to get the correct opcode. An incorrect value may result in a corrupted flash. set control 0xDC000021 master_write_32 $m $AsmiControl $control # Write address to perform sector erase to the lower 4 data master_write_32 $m $AsmiWriteData0 $addr This problem is fixed starting from Intel® Quartus® Prime Pro Edition Software version 19.1. Custom Fields values: ['novalue'] Troubleshooting 1409007821 False ['Altera S10 Mailbox Client Core'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.1 18.1.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']