Why does set_max_skew constraint not take effect? - Why does set_max_skew constraint not take effect? Description Due to a problem in the document SDC and TimeQuest API Reference Manual, you may find this sentence with an incorrect description of set_max_skew: set_max_skew timing constraint is not affected by set_max_delay,set_min_delay and set_multicycle_path but it does obey set_false_path and set_clock_groups. The correct description of set_max_skew should be as below: The constraint set_max_skew is affected by set_false_path and set_clock_groups: paths cut by a false path will not be analyzed for skew, and no two paths will be compared for skew if their clocks are exclusive to each other. Resolution Future versions of the Intel® Quartus® Prime Prime Pro Edition Help is scheduled to be updated. Custom Fields values: ['novalue'] Troubleshooting 1507198472 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.2 19.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']