Why does my Intel® Stratix® 10 TX or MX device with E-tile transceivers fail to configure after adding the PRESERVE_UNUSED_XCVR_CHANNEL Intel Quartus® Settings File (QSF) assignment? - Why does my Intel® Stratix® 10 TX or MX device with E-tile transceivers fail to configure after adding the PRESERVE_UNUSED_XCVR_CHANNEL Intel Quartus® Settings File (QSF) assignment? Description Your Intel® Stratix® 10 TX or MX device with E-tile transceivers may fail to configure after adding the PRESERVE_UNUSED_XCVR_CHANNEL QSF assignment if a completely unused E-tile has a static signal applied to REFCLK_GXE[BANK]_CH0[P/N]. Intel® Stratix®10 TX and MX devices with instantiated E-tile transceivers require a toggling reference clock for the FPGA to configure. The addition of the PRESERVE_UNUSED_XCVR_CHANNEL QSF assignment protects unused channels by enabling transceiver circuits. However, they require a reference clock to run. Therefore, the FPGA may not configure if this reference clock is missing. Resolution To work around this problem when using the global PRESERVE_UNUSED_XCVR_CHANNEL QSF assignment, you can instantiate dummy transceiver channels in unused E-tiles, ensuring they have a toggling reference clock at configuration. All preserved channels in those tiles will use the same reference clock. Alternatively, you can use the per-pin PRESERVE_UNUSED_XCVR_CHANNEL QSF assignment only to preserve channels in tiles that are intended to be used. If a tile is never intended to be used, you should not add the per-pin PRESERVE_UNUSED_XCVR_CHANNEL QSF assignment. Examples of PRESERVE_UNUSED_XCVR_CHANNEL QSF assignments are below. Global QSF assignment set_global_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON Per-pin QSF assignment set_instance_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON -to AA75 This information will be added to a future version of the E-Tile Transceiver PHY User Guide and Intel Stratix 10 Configuration User Guide. Custom Fields values: ['novalue'] Troubleshooting 1807523646,1808639755 False ['Stratix® 10 E-Tile Transceiver Native PHY'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.1 19.2 ['Stratix® 10 MX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']