MAX10 sideways migration - MAX10 sideways migration It is possible to perform sideways migration between MAX10 SC (compact feature) and MAX10 SA (analog feature) using the same package, of course, as long as no ADC is used? If so, any special precautions needed on the unused analog pins? Replies: Re: MAX10 sideways migration I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘ https://supporttickets.intel.com ’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. Replies: Re: MAX10 sideways migration You can close the thread. Thank you. Replies: Re: MAX10 sideways migration Hello, With the answer provided, do you need more support on this? Can I close this thread? Regards, Aqid Replies: Re: MAX10 sideways migration Hi, I understand your requirement. Since the vertical migration is possible for the device with different logic elements but has the same pinout, it means the device that has the same logic elements and only different in the feature options is also possible to do migration. In this case, your requirement is valid for the migration since both have the same pinout. Regards, Aqid Replies: Re: MAX10 sideways migration Thanks AqidAyman, but I'm not asking about vertical migration. I'm asking about horizontal migration, if you want to call it like that, between devices with the same package but different feature options. This is not covered in the documentation, neither seems to be supported by the Quartus Pin Planner. Specifically, I want to migrate a SC (single supply, compact feature option) device to a SA (single supply, analog feature option) one, both with the same package, of course. Pinout seems to be same, then it seems that it should be possible to migrate between the two feature options as long as no ADC is actually used. But I would like a confirmation that this migration is possible. Thanks, Replies: Re: MAX10 sideways migration For the I/O vertical migration for Max 10, you can refer to this link: https://www.intel.com/content/www/us/en/docs/programmable/683658/current/i-o-vertical-migration-support.html