Why does Nios® V/g processor fail to debug when Instruction Tightly Coupled Memory (TCM) is enabled in the design? - Why does Nios® V/g processor fail to debug when Instruction Tightly Coupled Memory (TCM) is enabled in the design? Description Due to a problem with the Nios® V/g processor in the Quartus® Prime Pro Edition Software version 23.3, the debugger can not access Instruction TCM in a Nios® V/g processor design. Resolution This problem is caused by the exclusive allocation of instruction memory in Instruction TCM, preventing its use as both instruction and data memories. This problem is fixed in Quartus® Prime Pro Edition Software version 23.4 and later versions. Custom Fields values: ['novalue'] Troubleshooting 16021624917 False ['Nios V/g Processor IP'] ['FPGA Dev Tools Quartus® Prime Software'] 23.4 23.3 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']