spl.c:427:4: error: 'rst_mgr_status' undeclared (first use in this function) - spl.c:427:4: error: 'rst_mgr_status' undeclared (first use in this function) Description This error may be seen when compiling a Software Preloader (SPL) for Cyclone® V SOC or Arria® V SOC in the SoC EDS software version 15.0.1, if WARMRST_SKIP_CFGIO is disabled. Resolution To work around this problem in SoC EDS 15.0.1 either enable WARMRST_SKIP_CFGIO, or follow the steps below: Enable “CONFIG_HPS_RESET_WARMRST_HANDSHAKE_SDRAM” for your SPL BSP in the advanced section of the BSP-Editor GUI Re-generate the BSP Re-compile the SPL: Run make clean and make in your generated SPL directory This problem is scheduled to be fixed in a future version of the SoC EDS software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 15.0 ['Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']