Do the LED_AN or LED_LINK signals of Triple Speed Ethernet IP Core reflect the copper link status when the IP Core is in SGMII MAC mode? - Do the LED_AN or LED_LINK signals of Triple Speed Ethernet IP Core reflect the copper link status when the IP Core is in SGMII MAC mode? Description No, LED_AN / LED_LINK signals or AUTO_NEGOTIATION_COMPLETE / LINK_STATUS registers do not reflect the copper link status but the SGMII link status. Resolution In SGMII MAC mode, you need to read COPPER_LINK_STATUS register (PCS register address 0x05 bit[15]) to ascertain the copper link status. Custom Fields values: ['novalue'] Troubleshooting 2205727414 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] No plan to fix No plan to fix ['Arria® GX FPGA', 'Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® IV GX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA', 'Stratix® 10 GX FPGA', 'Stratix® 10 SX FPGA', 'Stratix® GX FPGA', 'Stratix® II FPGAs', 'Stratix® II GX FPGA', 'Stratix® III FPGAs', 'Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']