Qsys-Generated IP Compiler for PCI Express May Send Deassert_INTA Message While Interrupt is Still Asserted - Qsys-Generated IP Compiler for PCI Express May Send Deassert_INTA Message While Interrupt is Still Asserted Description When legacy interrupts are enabled, the IP Compiler for PCI Express can transmit a Deassert_INTA message while the interrupt is still asserted. This issue affects all IP Compiler for PCI Express Avalon-MM variations generated with Qsys that target an Arria II GX, Cyclone IV GX, or Stratix IV GX device. Resolution To avoid this issue, upgrade to version 11.1 of the IP Compiler for PCI Express. This issue is fixed in version 11.1 of the IP Compiler for PCI Express. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 11.1 11.0 ['Arria® II FPGAs', 'Arria® II GX FPGA', 'Cyclone® IV FPGAs', 'Stratix® IV FPGAs'] ['novalue'] ['novalue'] ['novalue']