FPGA Packaging Device Information - The following table provides θJA (junction-to-ambient thermal resistance) and θJC(junction-to-case thermal resistance) values for select devices. Design Pages {"description":"The packaging information page lists the device, number of pins, part number, silicon type, package type, and downloadable package drawing for the devices.","title":"FPGA Packaging Device Information"} Devices package The following table lists the device, number of pins, part number, silicon type, package type, and downloadable package drawing for the devices Altera® follows JEDEC JESD51 series standards to provide thermal resistances. The purpose of the JESD51 standards is to compare the thermal performance of various packages under standardized test conditions. While standardized thermal resistances can help compare the relative thermal performance of different packages, they cannot apply directly to the many specific applications because JESD51 test conditions may not match a specific application. Several factors affect the thermal performance of a device in a user's application. These include power dissipation in the component, airflow velocity, direction and turbulence level, power in adjacent components, two-sided vs. one-sided active component mounting, printed circuit board (PCB) orientation & construction, and adjacent boards and their power dissipation. It may be necessary to test or model specific applications. This testing and modeling of a component user's specific applications is the user's responsibility. The following table provides θJA (junction-to-ambient thermal resistance) and θJC(junction-to-case thermal resistance) values for the devices. Intel reserves the right to make changes to thermal resistances without notice in the future. For Stratix® 10 devices, thermal information is available in the form of a Compact Thermal Model (CTM) for each device part number. These thermal models are used to design a cooling solution. Please contact your local Sales Representative to request the thermal model for each Stratix 10 device in your design. bottom Board Developer Center. For PCB Manufacturing Information and Resources visit the PCB Manufacturing Information and Resources - 2026-03-10
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