Native phy simulation - Native phy simulation hi @iiwan @JohnT_Intel I am facing issue while simulating native phy along reset controller and atx pll. Native phy is not yet all generating the tx_clkout and rx_clkout Can you tell me the reason why i am not getting those clock s Replies: Re: Native phy simulation I see, that reconfig_reset is 1, and rx_locktodata and rx_locktoref is 0. I never sim native phy, but at hardware if this signals are 0, i think that it does not generate you rx_clkout. And I think if tx_clkout is good, that means, that refclk is good. And I think you have to send some serial to your rx_serial_data at high freq clock. Replies: Re: Native phy simulation Hii @Deshi_Intel Thanks for reply Please check this one Replies: Re: Native phy simulation Can you sim your design without Reset controller, gnd to analog and digital resets of native phy. It would help whether your have an error in your design or bug in sim generated IP core. Replies: Re: Native phy simulation HI, Do you have your project sim waveform that post in forum community for user review to aid in your issue debug ? Ideally in your sim testbench, once you provided all the clock input and release the reset_controller reset pin, NativePHY should start processing data and generate Tx_clkout and Rx_clkout. Thanks. Regards, dlim