How should the powerdown conduit on the IP Compiler for PCI Express be used? - How should the powerdown conduit on the IP Compiler for PCI Express be used? Description A new conduit has been introduced in the 12.1 version of the IP compiler for PCI Express® in Qsys called powerdown. This conduit contains the gxb_powerdown and pll_powerdown signals. These signals were previously contained in the pipe_ext conduit (see related solution ). You should export this interface and connect these signals as follows: Tie the gxb_powerdown signal to zero to enable the RX transceiver offset cancellation process. Drive the pll_powerdown signal with the inverse of the active-low signal pcie_rstn . Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.1 ['Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Cyclone® IV GX FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']