Why does the Triple-Speed Ethernet FPGA IP report a Length Error (rx_err[1]) for undersized packets? - Why does the Triple-Speed Ethernet FPGA IP report a Length Error (rx_err[1]) for undersized packets? Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.3, the Triple-Speed Ethernet FPGA IP will report a Length Error (rx_err[1]) whenever an undersized packet is received. Resolution To work around this problem, set the PAD_EN bit in the command_config[5] register to 1. This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.1 Custom Fields values: ['novalue'] Troubleshooting 16025735224 False ['Triple-Speed Ethernet IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 25.1 23.3 ['Agilex™ 5 FPGA E-Series', 'Agilex™ 7 FPGA I-Series', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']