Are Cadence* Xcelium* simulation scripts created when a 50G Interlaken Intel® FPGA IP example design is generated for Intel® Arria® 10 devices? - Are Cadence* Xcelium* simulation scripts created when a 50G Interlaken Intel® FPGA IP example design is generated for Intel® Arria® 10 devices? Description No, Cadence* Xcelium* simulation scripts are not generated for a 50G Interlaken Intel® FPGA IP example design targeting Intel® Arria® 10 devices. Scripts are generated to simulate the 50G Interlaken Intel® FPGA example design testbench in Modelsim*, NCSim* and VCS* when targeting an Intel Arria 10 device. Custom Fields values: ['novalue'] Troubleshooting FB: 584376; False ['Interlaken - 50G for 28nm and 20nm devices (PRIMARY) IP-ILKN/50G'] ['novalue'] novalue novalue ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25