Why are my source_sop and source_eop being optimized out of my multichannel FIR Compiler II implementation? - Why are my source_sop and source_eop being optimized out of my multichannel FIR Compiler II implementation?
Description Due to a bug in the Quartus® II FIR Compiler II Megafunction, multichannel implementations may result in the source_sop and source_eop being optimized away, which may cause problems in your design or in gate-level simulation. Resolution To workaround this issue, modify your auk_dspip_avalon_streaming_controller_hpfir.v/vhd file contained in your project folder/< fir_variation_folder >. In this file, at the bottom of the architecture block, just before the end struct; line, add the follow assignment: source_packet_error <= sink_packet_error; This issue will be fixed in a future release of Quartus II software.
Custom Fields values:
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Troubleshooting
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False
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['FPGA Dev Tools Quartus II Software']
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11.0
['Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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['novalue']
['novalue'] - 2021-08-25
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