Why do I see momentary decremented credit count on the TX Flow Control Interface of the P-Tile Avalon® Streaming FPGA IP for PCI Express? - Why do I see momentary decremented credit count on the TX Flow Control Interface of the P-Tile Avalon® Streaming FPGA IP for PCI Express? Description Due to a problem in the Quartus® Prime Pro Edition Software version 22.2 and earlier version, you may see momentary decremented credit count on TX Flow Control Interface of the P-Tile Avalon® Streaming FPGA IP for PCI Express. The impact of this issue is limited to the decremented credit count itself as the correct credit count value will be reflected in the next clock cycle and does not affect the overall credit tracking integrity in the intellectual property (IP). Resolution To work around this problem, implement a credit count filter in user logic that compares the current credit count value with the previous credit count value to invalidate decremented credit count value. This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 1509759618 False ['Interfaces'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.1 21.3 ['Agilex™ 7 FPGA F-Series', 'Stratix® 10 DX FPGA'] ['novalue'] ['novalue'] ['novalue']