Inaccurate Clock Cycle When MII/GMII/RGMII Local Loopback Option is Enabled in the Triple Speed Ethernet IP Core with IEEE1588v2 Feature - Inaccurate Clock Cycle When MII/GMII/RGMII Local Loopback Option is Enabled in the Triple Speed Ethernet IP Core with IEEE1588v2 Feature Description If you intend to use your generated IP with the Run as Nios II ModelSim flow in Eclipse, you must turn on the Enable support for Nios II ModelSim flow in Eclipse option on the Diagnostics tab in the parameter editor, or else your design may fail in Eclipse. Custom Fields values: ['novalue'] Troubleshooting novalue True ['Ethernet'] ['FPGA Dev Tools Quartus II Software'] novalue 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']